1. Field of the Invention
The present invention relates generally to digital filters.
2. Description of the Related Art
In the processing of digital signals, it is often advantageous to change from a first data rate suitable for a first network of digital circuits to a different second data rate that is suitable for a subsequent second network. If the second data rate is less than the first, the rate change is typically called decimation which comprises a filtering process configured to reduce aliasing followed by a downsampling process to effect the rate change. If the second data rate is greater than the first, the rate change is typically called interpolation which comprises an upsampling process to effect the rate change followed by a filtering process configured to reduce images.
FIG. 1 illustrates an exemplary interpolator system 20 in which an input data stream having an element x(n) at an input port 21 is upsampled by a symbolic switch 23 that increases the data rate by a factor R wherein R is an integer. The upsampled data stream is then filtered by a digital filter 24 that is configured to reduce images in an output data stream having an element y(n) at an output port 25.
In systems that process data at high rates, it is extremely important that the structure of the digital filter 24 is configured to reduce computational complexity. For this purpose, it has been found that a particularly advantageous version of the filter 24 is the combination of a comb filter 31 and a subsequent integrator filter 32 which are shown with their transfer functions in the filter system 30. These filters essentially perform a recursive running-sum process on the upsampled data stream out of the switch 23 wherein the comb filter 31 provides a moving sum and the integrator filter 32 provides an average of this sum.
The filter system 30 is significantly simplified by interchanging the comb filter and the switch as shown in the filter system 40. Because this interchange translates the comb filter to the low rate portion of the filter system, the differential delay R of the comb filter 31 in the system 30 reduces to 1 so that it is becomes a simple differentiator 41 in the system 40. That is, a 1-sample delay before upsampling by R is equivalent to an R-sample delay after the upsampling.
FIG. 1B shows that the transfer function of the comb filter 41 of FIG. 1A can be realized with an adder 43 that differences each data stream element x(n) with a delayed data stream element x(n−1) that is provided when the input data stream passes through a delay register 44. FIG. 1B also shows that the transfer function of the integrator filter 32 of FIG. 1A can be realized with an adder 45 that provides each output data stream element y(n) by summing an input data stream element x(n) with a delayed data stream element y(n−1) that is generated by feeding the output data stream back through another delay register 44.
The comb filter 41 thus subtracts a delayed data stream element from the current input data stream element whereas the integrator filter 32 is an accumulator that adds the current input data stream element to the previous output data stream element. Accordingly, the comb filter has a feed-forward structure and the integrator filter has a feed-back structure.
The filter system 40 of FIG. 1A is generally referred to as cascaded comb-integrator (CIC) filter which is especially suited for effecting a rate change from an initial data rate to a higher data rate while preserving the spectral characteristics of the input data stream and suppressing spectral images that are generated by the rate change. From the filter structure shown in FIG. 1B, it is apparent that the only arithmetic needed to implement a CIC filter is addition and subtraction. In addition, the above-described interchange of the comb filter and the switch significantly reduces the required data storage. Accordingly, CIC filters are particularly suited for use in a wide range of digital signal processing systems.
When these filters are required, however, to operate at ever-higher data rates it is generally found that integrated circuit implementations of CIC filters run into problems. For example, data timing problems become excessively problematical and filter dissipation rises because, at these higher rates, the filter adders must be realized with pipelined adder structures that substantially increase fabrication costs and system heating.